Hamburg, Germany, March 22 – We are very pleased to announce that this year’s Hans Meuer Award recipients are a team of five researchers from the Lawrence Berkeley National Laboratory for their evaluation of the classical hardware requirements for large-scale quantum computations.
The Hans Meuer Award is an annual award presented at ISC High Performance. It recognizes the most outstanding research paper the ISC research paper committee selects.
This year’s winning paper was authored by Daan Camps, Ermal Rrapaj, Katherine Klymko, Brian Austin, and Nicholas J. Wright from the Lawrence Berkeley National Laboratory. The award includes a cash prize of 3,000 euros, and their work will be published in the IEEE Xplore® Digital Library along with 22 other research papers selected for presentation at ISC 2024.
The authors’ research paper details a new model to evaluate the classical computing and networking resources required to support a large-scale fault-tolerant quantum computer based on superconducting qubits and a surface code architecture. The team focused on quantum error decoding, which is the primary classical computational task required to enable quantum error correction during runtime.
According to their model, the quantum computer operates at a logical clock speed in the range of 100-10,000 Hz, using state-of-the-art quantum error decoders. For a typical large-scale quantum chemistry computation, this translates to an overall runtime in the order of months. The workload is estimated to generate syndrome data for error correction at a rate of 2-500 Gbps, depending on whether data compression is used. The team estimates that the total computational processing power required for online error syndrome decoding equals about one petaflop.
The results of their analysis indicate that current computing and networking technology can meet the requirements, in terms of bandwidth, latency, and compute, to support large-scale quantum computation. However, there are still significant technological challenges for both quantum and classical hardware. These include scalable fabrication of high-quality qubits, scalable qubit control, and syndrome communication within a limited power budget.
The Research Paper Award Session will be held at ISC 2024 in Hall 4 on Monday, May 13, from 4:15 p.m. to 5:00 p.m.
Register by March 27 for Early-Bird Rates
Attendees who register by next Wednesday will enjoy the early-bird rates. We hope to see 3,000 members of the global high performance computing (HPC) community at ISC 2024 in Hamburg from May 12 to 16.
Join ISC High Performance 2024 in #Reinventing HPC
ISC 2024 returns to the Congress Center Hamburg. Since its inception in 1986, it has been acknowledged as the world’s oldest and Europe’s must-attend event for HPC, machine learning, and high-performance data analytics professionals. The exhibition will showcase the latest developments in HPC, covering all significant advancements in system design, programming models, applications, machine learning, quantum computing, and emerging technologies.
