JUNE 18–22, 2017
FRANKFURT AM MAIN, GERMANY

Brian van Essen

Project Leader DL, LLNL
 

Brian is Computer Scientist at the Center for Applied Scientific Computing at Lawrence Livermore National Laboratory (LLNL). He is actively pursuing research in training deep neural networks on high-performance computing systems. Deep neural networks (DNNs) require massive models and even larger data sets. His team is applying parallel programming techniques to leverage the unique characteristics of existing and upcoming HPC systems, namely: low-latency interconnect, node-local NVRAM, and GPUs. DNNs provide us a new tool that we can apply to a range of applications in national security, analysis of scientific instruments, and scientific data sets. Furthermore, they are exploring the applicability of using advanced neuromorphic architectures to execute deep neural networks. His research interests also include developing new Operating Systems and Runtimes (OS/R) that exploit persistent memory architectures for high-performance, data-intensive computing. Non-volatile random-access memories (NVRAM) are providing a competitive alternative to traditional DRAM in terms of price, performance, and density. He also researching high performance runtimes to leverage multi-level non-volatile memory hierarchies, and distributed node-local storage in exascale systems. Additionally, he is interested in opportunities related to mapping these scientific, data-intensive, and machine learning applications to Neuromorphic architectures, current and next-generation field-programmable gate arrays (FPGAs) and GP-GPUs. Migrating these applications from their traditional implementations into hardware description languages (HDLs), e.g. Verilog and VHDL, or domain specific languages and libraries, e.g. CUDA and OpenCL, frequently requires novel implementations in order to exploit spatial parallelism and avoid being overwhelmed with communication overhead. Dr. Van Essen joined LLNL in October of 2010 after earning his Ph.D. in Computer Science and Engineering from the University of Washington in Seattle.  He also holds a M.S in Computer Science and Engineering from the University of Washington, a M.S in Electrical and Computer Engineering from Carnegie Mellon University, and a B.S. in Electrical and Computer Engineering from Carnegie Mellon University. Prior to his graduate studies, Brian co-founded two startups in the area of reconfigurable computing and worked as a verification engineer at Cisco Systems.

 
Speaker at: How Deep Learning is Changing the HPC Landscape
Wednesday, June 21, 2017, 11:00 am - 12:30 pm
  Scalable Deep Learning for Scientific Data Sets
Wednesday, June 21, 2017, 11:00 am - 11:30 am